/************************************************************
* @file  gkt_peripheral_defines.h
* @brief GK1901 internal peripheral definitions
************************************************************/

#ifndef GKT_PERIPHERAL_DEFINES_H
#define GKT_PERIPHERAL_DEFINES_H

/* device irq numbers */
#define GKT_DEVIRQ_NUMS	32

/* FLASH */
#define GKT_FLASH_ONCHIP_TYPE	qspiflash

/* FLASH -- QSPIFLASH (external flash) */
#define GKT_QSPIFLASH_ID	0
#define GKT_QSPIFLASH_REGION_NUMS	1
#define GKT_QSPIFLASH_BASEADDR	0x1000000	// 0x1000200
#define GKT_QSPIFLASH_MAXSIZE	0x200000	// 0x1FFC00
#define GKT_QSPIFLASH_SYSTEM_RESERVED_SIZE	0x200
#define GKT_QSPIFLASH_PAGE_SIZE	0x100
#define GKT_QSPIFLASH_SECTOR_SIZE	0x1000
#define GKT_QSPIFLASH_BLOCK_32K_SIZE	0x8000
#define GKT_QSPIFLASH_BLOCK_64K_SIZE	0x10000

/* ROM */
#define GKT_ROM_BASEADDR	0x10000000
#define GKT_ROM_SIZE	0x8000

/* SRAM */
#define GKT_SRAM_BASEADDR	0x20000
#define GKT_SRAM_SIZE	0x50000

/************************************************************
 * RTC
 ************************************************************/
//#if (GKT_CONFIG_RTC_CLOCK_SOURCE == 1)
//#define GKT_RTC_BASEADDR	0xFB000
//#else
//#define GKT_RTC_BASEADDR	0xFAF00
//#endif
#define GKT_RTC_IRQ_NO	27
#define GKT_RTC_IRQ_PRIORITY	NORMAL
#define GKT_RTC_CALENDAR_ACTIVE_DELAY_S	2

/************************************************************
 * GPIO
 ************************************************************/
#define GKT_GPIO_MAXNUMS	1

#define GKT_GPIO0_BASEADDR	0xF8700
#define GKT_GPIO0_IRQ_NO	16
#define GKT_GPIO0_IRQ_PRIORITY	NORMAL
#define GKT_GPIO0_PORT_NUMS	5
#define GKT_GPIO0_PORTA_PIN_NUMS	16
#define GKT_GPIO0_PORTA_INT_NUMS	16
#define GKT_GPIO0_PORTA_PIN_BITS	0xFFFF
#define GKT_GPIO0_PORTA_INT_BITS	0xFFFF
#define GKT_GPIO0_PORTB_PIN_NUMS	16
#define GKT_GPIO0_PORTB_INT_NUMS	16
#define GKT_GPIO0_PORTB_PIN_BITS	0xFFFF
#define GKT_GPIO0_PORTB_INT_BITS	0xFFFF
#define GKT_GPIO0_PORTC_PIN_NUMS	16
#define GKT_GPIO0_PORTC_INT_NUMS	16
#define GKT_GPIO0_PORTC_PIN_BITS	0xFFFF
#define GKT_GPIO0_PORTC_INT_BITS	0xFFFF
#define GKT_GPIO0_PORTD_PIN_NUMS	16
#define GKT_GPIO0_PORTD_INT_NUMS	16
#define GKT_GPIO0_PORTD_PIN_BITS	0xFFFF
#define GKT_GPIO0_PORTD_INT_BITS	0xFFFF
#define GKT_GPIO0_PORTE_PIN_NUMS	16
#define GKT_GPIO0_PORTE_INT_NUMS	16
#define GKT_GPIO0_PORTE_PIN_BITS	0xFFFF
#define GKT_GPIO0_PORTE_INT_BITS	0xFFFF

/************************************************************
 * I2C
 ************************************************************/
#define GKT_I2C_MAXNUMS	2

#define GKT_I2C0_BASEADDR	0xF911C
#define GKT_I2C0_IRQ_NO		1
#define GKT_I2C0_IRQ_PRIORITY	NORMAL
#define GKT_I2C0_SLAVE_SUPPORT		0
#define GKT_I2C0_MASTER_SUPPORT	1

#define GKT_I2C1_BASEADDR	0xF921C
#define GKT_I2C1_IRQ_NO		2
#define GKT_I2C1_IRQ_PRIORITY	NORMAL
#define GKT_I2C1_SLAVE_SUPPORT		0
#define GKT_I2C1_MASTER_SUPPORT	1

/************************************************************
 * WDT
 ************************************************************/
#define GKT_WDT_MAXNUMS	1
#define GKT_WDT0_BASEADDR	0xF0000
#define GKT_WDT0_IRQ_NO		24
#define GKT_WDT0_IRQ_PRIORITY	NORMAL

/************************************************************
 * TIMER (DW) 17 18
 ************************************************************/
#define GKT_TIMER_MAXNUMS	2
#define GKT_TIMER_BASEADDR	0xF0C00
#define GKT_TIMER0_IRQ_NO	17
#define GKT_TIMER0_IRQ_PRIORITY	NORMAL
#define GKT_TIMER0_PWM_ENABLE	0

#define GKT_TIMER1_IRQ_NO	18
#define GKT_TIMER1_IRQ_PRIORITY	NORMAL
#define GKT_TIMER1_PWM_ENABLE	0

/************************************************************
 * UART
 * if 'GKT_UART_CLOCK_FIXDIV' is defined
 *   1) with un-ZERO value: the uart clock is decided by 
 *      CLOCK_SOURCE with fixed frequence divisior, and the 
 *      macro 'GKT_UART_CLOCK' is ignored;
 *   2) with ZERO value: the uart clock is specified by macro
 *      'GKT_UART_CLOCK', we should decide a proper divisior
 *      to config the related register
 ************************************************************/
#define GKT_UART_MAXNUMS	4
#define GKT_UART_BAUDRATE_MIN	9600
#define GKT_UART_BAUDRATE_MAX	460800
#define GKT_UART_FIFO_DEPTH	16
#define GKT_UART_FIFO_WIDTH	32
#define GKT_UART_DLF_WIDTH	4

#define GKT_UART0_BASEADDR	0xF8B1C
#define GKT_UART0_IRQ_NO	8
#define GKT_UART0_IRQ_PRIORITY	NORMAL
#define GKT_UART0_HW_FLOWCTRL	NONE
#define GKT_UART0_DMA_SUPPORT	0

#define GKT_UART1_BASEADDR	0xF8C1C
#define GKT_UART1_IRQ_NO	9
#define GKT_UART1_IRQ_PRIORITY	NORMAL
#define GKT_UART1_HW_FLOWCTRL	NONE
#define GKT_UART1_DMA_SUPPORT	0

#define GKT_UART2_BASEADDR	0xF8D1C
#define GKT_UART2_IRQ_NO	10
#define GKT_UART2_IRQ_PRIORITY	NORMAL
#define GKT_UART2_HW_FLOWCTRL	NONE
#define GKT_UART2_DMA_SUPPORT	0

#define GKT_UART3_BASEADDR	0xF8E1C
#define GKT_UART3_IRQ_NO	11
#define GKT_UART3_IRQ_PRIORITY	NORMAL
#define GKT_UART3_HW_FLOWCTRL	NONE
#define GKT_UART3_DMA_SUPPORT	0

/************************************************************
* SPI
************************************************************/
#define GKT_SPI_MAXNUMS	3
#define GKT_SPI0_IRQ_NO	4
#define GKT_SPI1_IRQ_NO	5
#define GKT_SPI2_IRQ_NO	6

/************************************************************
 * CRYPTO
 ************************************************************/
#define GKT_CRYPTO_MAXNUMS		1

#define GKT_CRYPTO_AES_SUPPORT	1
#define GKT_CRYPTO_DES_SUPPORT	1
#define GKT_CRYPTO_3DES_SUPPORT	1
#define GKT_CRYPTO_SHA1_SUPPORT	1
#define GKT_CRYPTO_SHA256_SUPPORT	1
#define GKT_CRYPTO_MODE_ECB_SUPPORT	1
#define GKT_CRYPTO_MODE_CBC_SUPPORT	1

/************************************************************
* ADC
************************************************************/
#define	GKT_ADC_MAXNUMS	1
#define GKT_ADC0_BASEADDR	0xFB240
#define GKT_ADC0_IRQ_NO		26
#define GKT_ADC0_IRQ_PRIORITY	HIGH
#define GKT_ADC0_CHANNEL_MAXNUMS	4
#define GKT_ADC0_PIN_CH_MAP	{ 0, 1, 8, 9 }

/************************************************************
 * USB
 ************************************************************/
#define GKT_USB_MAXNUMS	1
#define GKT_USB_HOST_SUPPORT	1
#define GKT_USB_PERIPHERAL_SUPPORT	1
#define GKT_USB_DMA_SUPPORT	0
#define GKT_USB_SRP_SUPPORT	1
#define GKT_USB_HNP_SUPPORT	1

#define GKT_USB0_BASEADDR	0x40080C00
#define GKT_USB0_IRQ_NO	25
#define GKT_USB0_IRQ_PRIORITY	NORMAL
#define GKT_USB0_TXEP_MAXNUMS	2
#define GKT_USB0_RXEP_MAXNUMS	2
#define GKT_USB0_FIFO_DEPTH	128

#endif	/* GKT_PERIPHERAL_DEFINES_H */


